Index: source/lib/sysdep/arch/x86_x64/topology.cpp
===================================================================
--- source/lib/sysdep/arch/x86_x64/topology.cpp
+++ source/lib/sysdep/arch/x86_x64/topology.cpp
@@ -101,6 +101,18 @@
 			DEBUG_WARN_ERR(ERR::CPU_FEATURE_MISSING);
 		const size_t logicalPerPackage = bits(regs.ebx, 16, 23);
 		const size_t maxCoresPerPackage = MaxCoresPerPackage();
+
+#if GCC_VERSION && defined(__i386__) && defined(__PIC__)
+		// first generation Intel multi-core systems without HT (Penryn,
+		// Wolfdale, Yorkfield) falsely set the HT bit
+		// its confused inline asm in x86_x64::__cpuid() for GCC+i386+PIC
+		// hide assert and disable hyperthreading
+		if(logicalPerPackage % maxCoresPerPackage && x86_x64::Vendor() == x86_x64::VENDOR_INTEL && x86_x64::Family() == 6)
+		{
+
+			return 1;
+		}
+#endif
 		// cores ought to be uniform WRT # logical processors
 		ENSURE(logicalPerPackage % maxCoresPerPackage == 0);
 		const size_t maxLogicalPerCore = logicalPerPackage / maxCoresPerPackage;